"Design of high-linearity delay detection circuit for 10-Gb/s communication ..."

Kosuke Furuichi et al. (2016)

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DOI: 10.1109/ISOCC.2016.7799777

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Kosuke Furuichi, Hiromu Uemura, Natsuyuki Koda, Hiromi Inaba, Keiji Kishine:
Design of high-linearity delay detection circuit for 10-Gb/s communication system in 65-nm CMOS. ISOCC 2016: 261-262

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