"Architectures and Circuits for Analog-memory-based Hardware Accelerators ..."

Hsinyu Tsai et al. (2023)

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DOI: 10.1109/ISCAS46773.2023.10181650

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Hsinyu Tsai, Pritish Narayanan, Shubham Jain, Stefano Ambrogio, Kohji Hosokawa, Masatoshi Ishii, Charles Mackin, Ching-Tzu Chen, Atsuya Okazaki, Akiyo Nomura, Irem Boybat, Ramachandran Muralidhar, Martin M. Frank, Takeo Yasuda, Alexander M. Friz, Yasuteru Kohda, An Chen, Andrea Fasoli, Malte J. Rasch, Stanislaw Wozniak, Jose Luquin, Vijay Narayanan, Geoffrey W. Burr:
Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited). ISCAS 2023: 1-5

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