"A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with ..."

Wei Lu et al. (2024)

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DOI: 10.1109/ISCAS58744.2024.10558053

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-16

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Wei Lu, Han-Hsiang Pei, Jheng-Rong Yu, Hung-Ming Chen, Po-Tsang Huang:
A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning. ISCAS 2024: 1-5

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