"Multi-level memory systems using error control codes."

Hsie-Chia Chang et al. (2004)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2016-05-20

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  dblp key:
  - conf/iscas/ChangLHWW04
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  - https://dblp.org/rec/conf/iscas/ChangLHWW04
Hsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang:
Multi-level memory systems using error control codes. ISCAS (2) 2004: 393-396

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