"PATIS: Using partial configuration to improve static FPGA design productivity."

Tannous Frangieh et al. (2010)

> Home

Details and statistics

DOI: 10.1109/IPDPSW.2010.5470755

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/ipps/FrangiehCRICP10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ipps/FrangiehCRICP10
Tannous Frangieh, Athira Chandrasekharan, Sureshwar Rajagopalan, Yousef Iskander, Stephen D. Craven, Cameron D. Patterson:
PATIS: Using partial configuration to improve static FPGA design productivity. IPDPS Workshops 2010: 1-8

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.