"Validation of eHS FPGA reconfigurable low-latency electric and power ..."

Jean Bélanger et al. (2013)

> Home

Details and statistics

DOI: 10.1109/IECON.2013.6700017

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-29

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iecon/BelangerYYCR13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iecon/BelangerYYCR13
Jean Bélanger, Amine Yamane, Andy Yen, Sébastien Cense, Pierre-Yves Robert:
Validation of eHS FPGA reconfigurable low-latency electric and power electronic circuit solver. IECON 2013: 5418-5423

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.