"A Convolutional Neural Network VLSI Architecture Using Sorting Model for ..."

Osamu Nomura et al. (2005)

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DOI: 10.1007/11539902_129

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Osamu Nomura, Takashi Morie, Masakazu Matsugu, Atsushi Iwata:
A Convolutional Neural Network VLSI Architecture Using Sorting Model for Reducing Multiply-and-Accumulation Operations. ICNC (3) 2005: 1006-1014

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