"Ultra Low Power Single-ended 6T SRAM Using 40 nm CMOS Technology."

Chua-Chin Wang, I-Ting Tseng (2019)

> Home

Details and statistics

DOI: 10.1109/ICICDT.2019.8790848

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-18

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/icicdt/WangT19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icicdt/WangT19
Chua-Chin Wang, I-Ting Tseng:
Ultra Low Power Single-ended 6T SRAM Using 40 nm CMOS Technology. ICICDT 2019: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.