"FPGA-based Low-Batch Training Accelerator for Modern CNNs Featuring High ..."

Shreyas K. Venkataramanaiah et al. (2020)

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DOI: 10.1145/3400302.3415643

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-19

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  - https://dblp.org/rec/conf/iccad/Venkataramanaiah20
Shreyas K. Venkataramanaiah, Han-Sok Suh, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-Sun Seo:
FPGA-based Low-Batch Training Accelerator for Modern CNNs Featuring High Bandwidth Memory. ICCAD 2020: 74:1-74:8

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