"Timing constraint-driven technology mapping for FPGAs considering false ..."

Lei Cheng et al. (2007)

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DOI: 10.1109/ICCAD.2007.4397292

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig:
Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ICCAD 2007: 370-375

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