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"High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA."
Panu Sjovall et al. (2017)
- Panu Sjovall, Vili Viitamäki, Jarno Vanne, Timo D. Hämäläinen:
High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA. ICASSP 2017: 1547-1551
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