"ASIC Implementation of An All-digital Self-adaptive PVTA Variation-aware ..."

Jordi Perez-Puigdemont, Francesc Moll (2016)

> Home

Details and statistics

DOI: 10.1145/2902961.2903006

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/glvlsi/Perez-Puigdemont16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/Perez-Puigdemont16
Jordi Perez-Puigdemont, Francesc Moll:
ASIC Implementation of An All-digital Self-adaptive PVTA Variation-aware Clock Generation System. ACM Great Lakes Symposium on VLSI 2016: 381-384

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.