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"An on-chip testbed that emulates runtime traffic and reduces design ..."

Wayne Chen, Lesley Shannon (2008)

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DOI: 10.1109/FPT.2008.4762418

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Wayne Chen, Lesley Shannon:
An on-chip testbed that emulates runtime traffic and reduces design verification time for FPGA designs. FPT 2008: 361-364

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