"An FPGA Solver for SAT-Encoded Formal Verification Problems."

Kenji Kanazawa, Tsutomu Maruyama (2011)

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DOI: 10.1109/FPL.2011.18

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/fpl/KanazawaM11
Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for SAT-Encoded Formal Verification Problems. FPL 2011: 38-43

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