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2020 – today
- 2024
[j7]Yusuke Yamagiwa, Yuki Kawahara, Kenji Kanazawa, Moritoshi Yasunaga:
A highly scalable Self-organizing Map accelerator on FPGA and its performance evaluation. Artif. Life Robotics 29(1): 94-100 (2024)- [c12]Jiheng Wang, Kenji Kanazawa, Moritoshi Yasunaga:
FPGA Implementation of Minimum Spanning Tree Calculation Towards Application for Capacitated Vehicle Routing Problems. ICCE 2024: 1-3 - [c11]Yusuke Yamagiwa, Kenji Kanazawa, Moritoshi Yasunaga:
A FPGA-based Learning Accelerator for Self-Organizing Map and Its Application to Trend-Visualization. ICCE 2024: 1-5 - 2022
- [j6]Kenji Kanazawa:
FPGA Acceleration of Swap-Based Tabu Search for Solving Maximum Clique Problems. J. Inf. Process. 30: 513-524 (2022)
2010 – 2019
- 2019
- [c10]Kenichi Harada, Kenji Kanazawa, Moritoshi Yasunaga:
FPGA-Based Object Detection for Autonomous Driving System. FPT 2019: 465-468 - [c9]Kenji Kanazawa:
Accelerating Swap-Based Tabu Search for Solving Maximum Clique Problems on FPGA. ISPA/BDCloud/SocialCom/SustainCom 2019: 1033-1040 - 2018
- [c8]Kenji Kanazawa, Shaowei Cai
:
FPGA Acceleration to Solve Maximum Clique Problems Encoded into Partial MaxSAT. MCSoC 2018: 217-224 - 2017
- [j5]Kenji Kanazawa, Tsutomu Maruyama:
An Approach for Solving SAT/MaxSAT-Encoded Formal Verification Problems on FPGA. IEICE Trans. Inf. Syst. 100-D(8): 1807-1818 (2017) - 2016
- [j4]Shohei Sassa, Kenji Kanazawa, Shaowei Cai, Moritoshi Yasunaga:
An FPGA Solver for Partial MaxSAT Problems Based on Stochastic Local Search. SIGARCH Comput. Archit. News 44(4): 32-37 (2016) - 2015
- [c7]Kenji Kanazawa, Kahori Kemmotsu, Yamato Mori, Noriyuki Aibe, Moritoshi Yasunaga:
High-Speed Calculation of Convex Hull in 2D Images Using FPGA. PARCO 2015: 533-542 - 2014
- [c6]Kenji Kanazawa, Tsutomu Maruyama:
FPGA acceleration of SAT/Max-SAT solving using variable-way cache. FPL 2014: 1-4 - 2013
- [j3]Kazuki Nakamura, Kenji Kanazawa, Norihisa Kobayashi:
Electrochemically-switchable emission and absorption by using luminescent Lanthanide(III) complex and electrochromic molecule toward novel display device with dual emissive and reflective mode. Displays 34(5): 389-395 (2013) - 2011
- [c5]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for SAT-Encoded Formal Verification Problems. FPL 2011: 38-43 - 2010
- [j2]Kenji Kanazawa, Tsutomu Maruyama:
An Approach for Solving Large SAT Problems on FPGA. ACM Trans. Reconfigurable Technol. Syst. 4(1): 10:1-10:21 (2010)
2000 – 2009
- 2007
- [c4]Yoshiki Yamaguchi, Kenji Kanazawa, Yoshiharu Ohke, Tsutomu Maruyama:
An Acceleration Method for Evolutionary Systems Based on Iterated Prisoner's Dilemma. ARC 2007: 358-364 - [c3]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for Very Large SAT Problems. FPL 2007: 493-496 - 2006
- [c2]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for Large SAT Problems. FPL 2006: 1-6 - 2005
- [j1]Tadashi Nemoto, Dmitri G. Fedorov, Masami Uebayasi, Kenji Kanazawa, Kazuo Kitaura, Yuto Komeiji:
Ab initio fragment molecular orbital (FMO) method applied to analysis of the ligand-protein interaction in a pheromone-binding protein. Comput. Biol. Chem. 29(6): 434-439 (2005) - [c1]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for WSAT Algorithms. FPL 2005: 83-88
Coauthor Index
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