"Timing-constrained minimum area/power FPGA memory mapping."

Fangqing Du et al. (2013)

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DOI: 10.1109/FPL.2013.6645565

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Fangqing Du, Colin Yu Lin, Xiuhai Cui, Jiabin Sun, Feng Liu, Fei Liu, Haigang Yang:
Timing-constrained minimum area/power FPGA memory mapping. FPL 2013: 1-4

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