"A 500 MHz 2d-DWT VLSI processor."

A. Brizio et al. (1998)

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type: Conference or Workshop Paper

metadata version: 2021-08-09

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  dblp key:
  - conf/eusipco/BrizioMPRZ98
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  - https://dblp.org/rec/conf/eusipco/BrizioMPRZ98
A. Brizio, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
A 500 MHz 2d-DWT VLSI processor. EUSIPCO 1998: 1-4

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