"Test generation for circuits with embedded memories using SMT."

Sarvesh Prabhu et al. (2013)

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DOI: 10.1109/ETS.2013.6569390

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - https://dblp.org/rec/conf/ets/PrabhuHLG13
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram:
Test generation for circuits with embedded memories using SMT. ETS 2013: 1

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