"Gate stack optimization to minimize power consumption in super-lattice fets."

Pasquale Maiorano et al. (2013)

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DOI: 10.1109/ESSDERC.2013.6818824

access: closed

type: Conference or Workshop Paper

metadata version: 2021-05-05

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Pasquale Maiorano, Elena Gnani, Antonio Gnudi, Susanna Reggiani, Giorgio Baccarani:
Gate stack optimization to minimize power consumption in super-lattice fets. ESSDERC 2013: 81-84

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