"Self-Synchrounous Circuits with Completion/Error Detection as a Candidate ..."

Kunihiro Asada et al. (2010)

> Home

Details and statistics

DOI: 10.1109/DFT.2010.61

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/dft/AsadaIDS10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dft/AsadaIDS10
Kunihiro Asada, Makoto Ikeda, Benjamin Stefan Devlin, Taku Sogabe:
Self-Synchrounous Circuits with Completion/Error Detection as a Candidate of Future LSI Resilient for PVT Variations and Aging. DFT 2010: 3

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.