"Extensible open-source framework for translating RTL VHDL IP cores to SystemC."

Syed Saif Abrar, Maksim Jenihhin, Jaan Raik (2013)

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DOI: 10.1109/DDECS.2013.6549799

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/ddecs/AbrarJR13
Syed Saif Abrar, Maksim Jenihhin, Jaan Raik:
Extensible open-source framework for translating RTL VHDL IP cores to SystemC. DDECS 2013: 112-115

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