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ORCIDSyed Saif Abrar
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2010 – 2019
- 2018
[j2]Klaus-Dieter Schubert, Syed Saif Abrar, Duane Averill, Ellen Bauman, Aaron C. Brown, Ron Cash, Debapriya Chatterjee, John Gullickson, Mark Nelson, Kevin A. Pasnik, Krishnan Sugavanam:
Addressing verification challenges of heterogeneous systems based on IBM POWER9. IBM J. Res. Dev. 62(4/5): 11:1-11:12 (2018)- 2015
- [c8]Syed Saif Abrar, Maksim Jenihhin
, Jaan Raik:
SystemC-Based Loose Models for Simulation Speed-Up by Abstraction of RTL IP Cores. DDECS 2015: 71-74 - [c7]Syed Saif Abrar, Maksim Jenihhin, Jaan Raik:
FSMD RTL design manipulation for clock interface abstraction. ICACCI 2015: 463-468 - 2013
- [c6]Syed Saif Abrar, Maksim Jenihhin, Jaan Raik:
Extensible open-source framework for translating RTL VHDL IP cores to SystemC. DDECS 2013: 112-115 - [c5]Syed Saif Abrar, Maksim Jenihhin, Jaan Raik, Shyam Kiran A., C. Babu:
Performance analysis of cosimulating processor core in VHDL and SystemC. ICACCI 2013: 563-568 - [c4]Syed Saif Abrar, Rajesh K. Arumugam:
Simulation Model of IBM-Watson Intelligent System for Early Software Development. UKSim 2013: 325-329 - 2010
- [c3]Syed Saif Abrar, Aravinda Thimmapuram:
Functional Refinement: A Generic Methodology for Managing ESL Abstractions. VLSI Design 2010: 122-127
2000 – 2009
- 2005
- [j1]Syed Saif Abrar:
Novel source-independent characterization methodology for embedded software energy estimation and optimization. J. Syst. Archit. 51(6-7): 395-404 (2005) - 2004
- [c2]Syed Saif Abrar:
Cycle-Accurate Energy Model and Source-Independent Characterization Methodology for Embedded Processors. VLSI Design 2004: 749-752 - 2002
- [c1]Syed Saif Abrar:
High Performance Multiprocessor Architecture Design Methodology for Application-Specific Embedded Systems. HiPC 2002: 102-111
Coauthor Index
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