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"An 830mW, 586kbps 1024-bit RSA chip design."
Chingwei Yeh et al. (2006)
- Chingwei Yeh, En-Feng Hsu, Kai-Wen Cheng, Jinn-Shyan Wang, Nai-Jen Chang:
An 830mW, 586kbps 1024-bit RSA chip design. DATE Designers' Forum 2006: 24-29
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