"Architectural Exploration Using Verilog-Based Power Estimation: A Case ..."

Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha P. Chandrakasan (1997)

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DOI: 10.1145/266021.266184

access: closed

type: Conference or Workshop Paper

metadata version: 2021-09-27

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Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha P. Chandrakasan:
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. DAC 1997: 415-420

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