"Petri net modeling of gate and interconnect delays for power estimation."

Ashok K. Murugavel, N. Ranganathan (2002)

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DOI: 10.1145/513918.514034

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Ashok K. Murugavel, N. Ranganathan:
Petri net modeling of gate and interconnect delays for power estimation. DAC 2002: 455-460

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