"Silicon validation of LUT-based logic-locked IP cores."

Gaurav Kolhe et al. (2022)

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DOI: 10.1145/3489517.3530606

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Gaurav Kolhe, Tyler Sheaves, Kevin Immanuel Gubbi, Tejas Kadale, Setareh Rafatirad, Sai Manoj P. D., Avesta Sasan, Hamid Mahmoodi, Houman Homayoun:
Silicon validation of LUT-based logic-locked IP cores. DAC 2022: 1189-1194

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