Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Architecture and methodology of a SoPC with 3.25Gbps CDR based SERDES and ..."

Ranianand Venkata et al. (2003)

> Home

Details and statistics

DOI: 10.1109/CICC.2003.1249481

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-15

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/cicc/VenkataWTCHLTSL03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/cicc/VenkataWTCHLTSL03
Ranianand Venkata, Wilson Wong, Tina Tran, Vinson Chan, Tim Hoang, Henry Lui, Uinh Ton, Sergey Shomurryev, Chong Lee, Shoujun Waiig, Huy Ngo, Malik Kdhani, Victor Maruri, Tin Lai, Tam Kpuyeu, Arch Zaliziiyak, Mei Luo, Toan Nguyen, Kazi Asaduzzaman, Siniardeep Maangat, John Lam, Rakesh Patel:
Architecture and methodology of a SoPC with 3.25Gbps CDR based SERDES and 1Gbps dynamic phase alignment. CICC 2003: 659-662

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.