"A 0.9V Supply 12.5Gb/s LVDS Receiver in 28nm CMOS Process."

Jinrong Li et al. (2021)

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DOI: 10.1109/ASICON52560.2021.9620302

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-06

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Jinrong Li, Jue Wang, Xu Cheng, Yicheng Zeng, Xiaoyang Zeng:
A 0.9V Supply 12.5Gb/s LVDS Receiver in 28nm CMOS Process. ASICON 2021: 1-4

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