"Systematic Construction of Resistor Ladder Network for N-ary DACs."

Manato Hirai et al. (2019)

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DOI: 10.1109/ASICON47005.2019.8983583

access: closed

type: Conference or Workshop Paper

metadata version: 2020-02-12

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Manato Hirai, Shuhei Yamamoto, Hirotaka Arai, Anna Kuwana, Hiroshi Tanimoto, Yuji Gendai, Haruo Kobayashi:
Systematic Construction of Resistor Ladder Network for N-ary DACs. ASICON 2019: 1-4

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