"Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits."

Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen (2006)

> Home

Details and statistics

DOI: 10.1109/APCCAS.2006.342077

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/apccas/HsiaoTW06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/apccas/HsiaoTW06
Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen:
Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits. APCCAS 2006: 1631-1634

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.