default search action
"A 102dB-SFDR 16-bit Calibration-Free SAR ADC in 180-nm CMOS."
Yung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng (2019)
- Yung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng:
A 102dB-SFDR 16-bit Calibration-Free SAR ADC in 180-nm CMOS. APCCAS 2019: 5-8
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.