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Chia-Hui Tien

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2020 – today

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2024
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Qi-Fen Zeng, Chia-Hui Tien, Yung-Hui Chung:
A 105-dB SFDR 16-bit SAR ADC with a Window Capacitor Calibration Scheme. ISCAS 2024: 1-4
2022
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Yung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng:
A 16-Bit Calibration-Free SAR ADC With Binary-Window and Capacitor-Swapping DAC Switching Schemes. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 88-99 (2022)

2010 – 2019

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2019
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Yung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng:
A 102dB-SFDR 16-bit Calibration-Free SAR ADC in 180-nm CMOS. APCCAS 2019: 5-8

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