"A middle-grain circuit partitioning strategy for 3-D integrated ..."

Jubee Tada et al. (2011)

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DOI: 10.1109/3DIC.2012.6263031

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Jubee Tada, Ryusuke Egawa, Kazushige Kawai, Hiroaki Kobayashi, Gensuke Goto:
A middle-grain circuit partitioning strategy for 3-D integrated floating-point multipliers. 3DIC 2011: 1-6

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