default search action
"Generation and Verification of Timing Attack Resilient Schedules During ..."
Steffen Peter, Tony Givargis (2022)
- Steffen Peter, Tony Givargis:
Generation and Verification of Timing Attack Resilient Schedules During the High-Level Synthesis of Integrated Circuits. Behavioral Synthesis for Hardware Security 2022: 343-363
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.