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I-Ting Lee
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2010 – 2019
- 2014
- [j11]I-Ting Lee, Shih-Han Ku, Shen-Iuan Liu:
An All-Digital Despreading Clock Generator. IEEE Trans. Circuits Syst. II Express Briefs 61-II(1): 16-20 (2014) - 2013
- [j10]I-Ting Lee, Kai-Hui Zeng, Shen-Iuan Liu:
A 4.8-GHz Dividerless Subharmonically Injection-Locked All-Digital PLL With a FOM of -252.5 dB. IEEE Trans. Circuits Syst. II Express Briefs 60-II(9): 547-551 (2013) - [j9]I-Ting Lee, Shih-Han Ku, Shen-Iuan Liu:
An All-Digital Spread-Spectrum Clock Generator With Self-Calibrated Bandwidth. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(11): 2813-2822 (2013) - [j8]I-Ting Lee, Yun-Ta Tsai, Shen-Iuan Liu:
A Wide-Range PLL Using Self-Healing Prescaler/VCO in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 21(2): 250-258 (2013) - [c5]I-Ting Lee, Yen-Jen Chen, Shen-Iuan Liu, Chewnpu Jou, Fu-Lung Hsueh, Hsieh-Hung Hsieh:
A divider-less sub-harmonically injection-locked PLL with self-adjusted injection timing. ISSCC 2013: 414-415 - 2012
- [j7]I-Ting Lee, Yun-Ta Tsai, Shen-Iuan Liu:
A Leakage-Current-Recycling Phase-Locked Loop in 65 nm CMOS Technology. IEEE J. Solid State Circuits 47(11): 2693-2700 (2012) - [j6]I-Ting Lee, Shen-Iuan Liu:
G-Band Injection-Locked Frequency Dividers Using π-type LC Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(2): 315-323 (2012) - [j5]I-Ting Lee, Hung-Yu Lu, Shen-Iuan Liu:
A 6-GHz All-Digital Fractional-N Frequency Synthesizer Using FIR-Embedded Noise Filtering Technique. IEEE Trans. Circuits Syst. II Express Briefs 59-II(5): 267-271 (2012) - [c4]I-Ting Lee, Yun-Ta Tsai, Shen-Iuan Liu:
A fast-locking phase-locked loop using CP control and gated VCO. VLSI-DAT 2012: 1-4 - 2011
- [c3]I-Ting Lee, Chiao-Hsing Wang, Shen-Iuan Liu:
3.6mW D-band divide-by-3 injection-locked frequency dividers in 65nm CMOS. A-SSCC 2011: 93-96 - [c2]I-Ting Lee, Yun-Ta Tsai, Shen-Iuan Liu:
A leakage-current-recycling phase-locked loop in 65nm CMOS technology. A-SSCC 2011: 137-140 - 2010
- [j4]Chow-Sing Lin, I-Ting Lee:
Applying multiple description coding to enhance the streaming scalability on CDN-P2P network. Int. J. Commun. Syst. 23(5): 553-568 (2010)
2000 – 2009
- 2009
- [j3]I-Ting Lee, Kun-Hung Tsai, Shen-Iuan Liu:
A 104- to 112.8-GHz CMOS Injection-Locked Frequency Divider. IEEE Trans. Circuits Syst. II Express Briefs 56-II(7): 555-559 (2009) - 2008
- [c1]Chow-Sing Lin, Wei-Ting Syu, I-Ting Lee:
Improving the Scalability of P2P Streaming Based on Fine-Grained Balancing Scheme. AINA 2008: 795-802 - 2007
- [j2]Jung-Lang Yu, Chih-Lung Hung, I-Ting Lee:
A two-stage partially adaptive linear receiver for CDMA MIMO systems with Alamouti's space-time block codes. Digit. Signal Process. 17(1): 244-260 (2007) - 2006
- [j1]Jung-Lang Yu, I-Ting Lee:
MIMO Capon Receiver and Channel Estimation for Space-Time Coded CDMA Systems. IEEE Trans. Wirel. Commun. 5(11): 3023-3028 (2006)
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