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Journal Articles
- 2002
[j4]Vinod Kathail, Shail Aditya, Robert Schreiber, B. Ramakrishna Rau, Darren C. Cronquist, Mukund Sivaraman:
PICO: Automatically Designing Custom Computers. Computer 35(9): 39-47 (2002)- [j3]Robert Schreiber, Shail Aditya, Scott A. Mahlke, Vinod Kathail, B. Ramakrishna Rau, Darren C. Cronquist, Mukund Sivaraman:
PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators. J. VLSI Signal Process. 31(2): 127-142 (2002) - 2001
- [j2]Mukund Sivaraman, Andrzej J. Strojwas:
Path delay fault diagnosis and coverage-a metric and an estimationtechnique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(3): 440-457 (2001) - 2000
- [j1]Mukund Sivaraman, Andrzej J. Strojwas:
Primitive path delay faults: identification and their use in timinganalysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(11): 1347-1362 (2000)
Conference and Workshop Papers
- 2002
- [c8]Mukund Sivaraman, Shail Aditya:
Cycle-time aware architecture synthesis of custom hardware accelerators. CASES 2002: 35-42 - 1997
- [c7]Mukund Sivaraman, Andrzej J. Strojwas:
Timing analysis based on primitive path delay fault identification. ICCAD 1997: 182-189 - [c6]Mukund Sivaraman, Andrzej J. Strojwas:
Primitive Path Delay Fault Identification. VLSI Design 1997: 95-100 - 1996
- [c5]Mukund Sivaraman, Andrzej J. Strojwas:
Delay fault coverage: a realistic metric and an estimation technique for distributed path delay faults. ICCAD 1996: 494-501 - [c4]Mukund Sivaraman, Andrzej J. Strojwas:
Diagnosis of parametric path delay faults. VLSI Design 1996: 412-417 - [c3]Mukund Sivaraman, Andrzej J. Strojwas:
A diagnosability metric for parametric path delay faults. VTS 1996: 316-323 - 1995
- [c2]Mukund Sivaraman, Andrzej J. Strojwas:
Test Vector Generation for Parametric Path Delay Faults. ITC 1995: 132-138 - 1994
- [c1]Mukund Sivaraman, Andrzej J. Strojwas:
Towards Incorporating Device Parameter Variations in Timing Analysis. EDAC-ETC-EUROASIC 1994: 338-342
Coauthor Index
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