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2010 – 2019
- 2014
[j9]Mizuki Watanabe, Kazuyoshi Uematsu, Sun Woog Kim
, Kenji Toda, Mineo Sato:
Synthesis and Photoluminescence Properties of HEu1-xGdx(MoO4)2 Nanophosphor. IEICE Trans. Electron. 97-C(11): 1063-1067 (2014)- 2013
- [j8]Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda, Akashi Satoh:
Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption. IEICE Trans. Inf. Syst. 96-D(11): 2333-2343 (2013) - 2011
- [j7]Tadashi Ishigaki, Kenji Toda, Tatsuya Sakamoto, Kazuyoshi Uematsu, Mineo Sato:
Crystal Growth of Silicate Phosphors from the Vapor Phase. IEICE Trans. Electron. 94-C(11): 1745-1748 (2011)
2000 – 2009
- 2008
- [j6]Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda:
A Secure Content Delivery System Based on a Partially Reconfigurable FPGA. IEICE Trans. Inf. Syst. 91-D(5): 1398-1407 (2008) - [c23]Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda:
Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems. FPL 2008: 23-28 - [c22]Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda:
Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems. IWSEC 2008: 261-278 - 2007
- [j5]Toshihiro Katashita, Yoshinori Yamaguchi, Atusi Maeda, Kenji Toda:
FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet. IEICE Trans. Inf. Syst. 90-D(12): 1923-1931 (2007) - [c21]Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda:
A Secure Digital Content Delivery System Based on Partially Reconfigurable Hardware. FPT 2007: 253-256 - 2006
- [j4]Kenji Toda, Yoshitaka Kawakami, Shin-ichiro Kousaka, Yutaka Ito, Akira Komeno, Kazuyoshi Uematsu, Mineo Sato:
New Silicate Phosphors for a White LED. IEICE Trans. Electron. 89-C(10): 1406-1412 (2006) - [c20]Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi:
Highly Efficient String Matching Circuit for IDS with FPGA. FCCM 2006: 285-286 - [c19]Yohei Hori, Hiroyuki Yokoyama, Kenji Toda:
Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration. FPL 2006: 1-4 - [c18]Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi:
A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection. FPL 2006: 1-4 - 2005
- [c17]Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki:
Dynamic Load Balancing Using Network Transferable Computer. ICDCS Workshops 2005: 51-57 - [c16]Hiroyuki Yokoyama, Kenji Toda:
FPGA-Based Content Protection System for Embedded Consumer Electronics. RTCSA 2005: 502-507 - 2004
- [c15]Yohei Hori, Tsutomu Maruyama, Kenji Toda:
A tsume-shogi processor based on reconfigurable hardware. FPT 2004: 347-350 - 2003
- [c14]Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki:
Adaptable Load Balancing Using Network Transferable Computer Associated with Mobile IP. ICDCS Workshops 2003: 8-13 - 2000
- [c13]Fuminori Nakanishi, Shinnya Hiraike, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda:
A Flexible Scheduling for Automobile Control Using Imprecise Computation and Its Fundamental Evaluation. ICECCS 2000: 210-217
1990 – 1999
- 1999
- [j3]Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu:
Real-world applications of analog and digital evolvable hardware . IEEE Trans. Evol. Comput. 3(3): 220-235 (1999) - 1998
- [c12]Naoki Asakawa, Kenji Toda, Yoshimi Takeuchi:
Automation of Chamfering by an industrial Robot, for the Case of Machined Hole on a Cylindrical Workpiece. ICRA 1998: 2452-2457 - 1997
- [c11]Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi:
CODA-R: a reconfigurable testbed for real-time parallel computation. RTCSA 1997: 252-259 - 1995
- [c10]Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi:
Performance comparison of real-time architectures using simulation. RTCSA 1995: 150- - 1994
- [c9]Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi:
The Execution Model and the Architecture for Real-Time Parallel Systems. IFIP Congress (1) 1994: 177-182 - [c8]Kenji Toda, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi:
A Priority Forwarding Router Chip for Real-Time Interconnection Networks. RTSS 1994: 63-73 - 1993
- [c7]Kenji Nishida, Kenji Toda, Toshio Shimada, Yoshinori Yamaguchi:
The Hardware Architecture of the CODA Real-Time Parallel Processor. PARCO 1993: 395-402 - 1992
- [j2]Toshio Shimada, Kenji Toda, Kenji Nishida:
Real-Time Parallel Architecture for Sensor Funsion. J. Parallel Distributed Comput. 15(2): 143-152 (1992) - [c6]Kenji Toda, Kenji Nishida, Shuichi Sakai, Toshio Shimada:
A priority forwarding scheme for real-time multistage interconnection networks. RTSS 1992: 208-217 - 1991
- [c5]Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada:
Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism. IPPS 1991: 336-343 - 1990
- [j1]Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba:
Evaluation of a Data-Driven Machine with Advanced Control Mechanism. Syst. Comput. Jpn. 21(5): 15-28 (1990)
1980 – 1989
- 1989
- [c4]Kenji Toda, Yoshinobu Uchibori, Toshitsugu Yuba:
The Gene Concept and its Implementation for a Dataflow Schemed Parallel Computer. PARLE (1) 1989: 306-322 - 1986
- [c3]Jayantha A. Herath, Nobuo Saito, Kenji Toda, Yoshinori Yamaguchi, Toshitsugu Yuba:
DBCL: Data-Flow Computing Base Language with n-Value Logic. FJCC 1986: 353-361 - 1984
- [c2]Yoshinori Yamaguchi, Kenji Toda, Jayantha A. Herath, Toshitsugu Yuba:
EM-3: A Lisp-Based Data-Driven Machine. FGCS 1984: 524-532 - 1983
- [c1]Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba:
A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3). ISCA 1983: 363-369
Coauthor Index
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