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ORCIDYoshinori Yamaguchi
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2010 – 2019
- 2010
[c38]Kota Mizushima, Atusi Maeda, Yoshinori Yamaguchi:
Packrat parsers can handle practical grammars in mostly constant space. PASTE 2010: 29-36
2000 – 2009
- 2007
- [j8]Toshihiro Katashita
, Yoshinori Yamaguchi, Atusi Maeda, Kenji Toda:
FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet. IEICE Trans. Inf. Syst. 90-D(12): 1923-1931 (2007) - 2006
- [c37]Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi:
Highly Efficient String Matching Circuit for IDS with FPGA. FCCM 2006: 285-286 - [c36]Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi:
A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection. FPL 2006: 1-4 - [c35]Yasuji Seko, Yoshinori Yamaguchi, Yasuyuki Saguchi, Jun Miyazaki, Hiroyasu Koshimizu:
Proposal of recordable pointer: Pointed position measurement by projecting interference concentric circle pattern with a pointing device. ICPR (4) 2006: 825-828 - 2002
- [c34]Tsutomu Abe, Kiwame Tokai, Yoshinori Yamaguchi, Osamu Nishikawa, Tetsuo Iyoda:
New range finder based on the re-encoding method and its application to 3D object modeling. Three-Dimensional Image Capture and Applications 2002: 20-29 - 2001
- [c33]Andrew Sohn, Yuetsu Kodama, Jui-Yuan Ku, Mitsuhisa Sato, Yoshinori Yamaguchi:
Tolerating Communication Latency through Dynamic Thread Invocation in a Multithreaded Architecture. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 525-552
1990 – 1999
- 1999
- [c32]Andrew Sohn, Yunheung Paek, Jui-Yuan Ku, Yuetsu Kodama, Yoshinori Yamaguchi:
Communication Studies of Single-Threaded and Multithreaded Distributed-Memory Multiprocessors. HPCA 1999: 310-314 - 1998
- [c31]Osamu Tatebe, Yuetsu Kodama, Satoshi Sekiguchi, Yoshinori Yamaguchi:
Highly Efficient Implementation of MPI Point-to-Point Communication Using Remote Memory Operations. International Conference on Supercomputing 1998: 267-273 - [c30]Hayato Yamana, Hanpei Koike, Yuetsu Kodama, Hirofumi Sakane, Yoshinori Yamaguchi:
Fast Speculative Search Engine on the Highly Parallel Computer EM-X. SIGIR 1998: 390 - 1997
- [c29]Yuetsu Kodama, Hirofumi Sakane, Hanpei Koike, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi:
Parallel Execution of Radix Sort Program Using Fine-Grain Communication. IEEE PACT 1997: 136-145 - [c28]Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Experience with Fine-Grain Communication in EM-X Multiprocessor for Parallel Sparse Matrix Computation. IPPS 1997: 242-248 - [c27]Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi:
CODA-R: a reconfigurable testbed for real-time parallel computation. RTCSA 1997: 252-259 - [c26]Andrew Sohn, Yuetsu Kodama, Jui Ku, Mitsuhisa Sato, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Fine-Grain Multithreading with the EM-X Multiprocessor. SPAA 1997: 189-198 - 1996
- [c25]Andrew Sohn, Jui Ku, Yuetsu Kodama, Mitsuhisa Sato, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Identifying the capability of overlapping computation with communication. IEEE PACT 1996: 133-138 - 1995
- [c24]Hayato Yamana, Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi:
A Macrotask-level Unlimited Speculative Execution on Multiprocessors. International Conference on Supercomputing 1995: 328-337 - [c23]Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
The EM-X Parallel Computer: Architecture and Basic Performance. ISCA 1995: 14-23 - [c22]Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi:
Performance comparison of real-time architectures using simulation. RTCSA 1995: 150- - 1994
- [c21]Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi:
The Execution Model and the Architecture for Real-Time Parallel Systems. IFIP Congress (1) 1994: 177-182 - [c20]Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
EM-C: Programming with Explicit Parallelism and Locality for EM-4 Multiprocessor. IFIP PACT 1994: 3-14 - [c19]Mitsuhisa Sato, Yuetsu Kodama, Yoshinori Yamaguchi, Shuichi Sakai:
Experience with Executing Shared Memory Programs using Fine-Grain Communication and Multithreading in EM-4. IPPS 1994: 630-636 - [c18]Yuetsu Kodama, Hirofumi Sakane, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi:
Message-based efficient remote memory access on a highly parallel computer EM-X. ISPAN 1994: 135-142 - [c17]Kenji Toda, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi:
A Priority Forwarding Router Chip for Real-Time Interconnection Networks. RTSS 1994: 63-73 - [c16]Andrew Sohn, Mitsuhisa Sato, Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Nonnumeric search results on the EM-4 distributed-memory multiprocessor. SC 1994: 301-310 - [c15]Andrew Sohn, Mitsuhisa Sato, Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Parallel bidirectional heuristic search on the EM-4 multiprocessor. SPDP 1994: 100-107 - [c14]Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Yoshinori Yamaguchi, Shuichi Sakai:
Programming with Distributed Data Structure for EM-X Multiprocessor. Theory and Practice of Parallel Programming 1994: 472-483 - 1993
- [j7]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Design and Implementation of a Circular Omega Network in the EM-4. Parallel Comput. 19(2): 125-142 (1993) - [j6]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Evaluation of parallel execution performance by highly parallel computer EM-4. Syst. Comput. Jpn. 24(9): 32-41 (1993) - [c13]Yuetsu Kodama, Yasuhito Koumura, Mitsuhisa Sato, Hirohumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi:
EMC-Y: Parallel Processing Element Optimizing Communication and Computation. International Conference on Supercomputing 1993: 167-174 - [c12]Kenji Nishida, Kenji Toda, Toshio Shimada, Yoshinori Yamaguchi:
The Hardware Architecture of the CODA Real-Time Parallel Processor. PARCO 1993: 395-402 - 1992
- [j5]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation. Future Gener. Comput. Syst. 7(2-3): 199-209 (1992) - [j4]Kazuaki Okamoto, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Methodologies in development and testing of the dataflow machine EM-4. Parallel Comput. 18(8): 901-912 (1992) - [c11]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Evaluation of the EM-4 Highly Parallel Computer using a Game Tree Searching Problem. FGCS 1992: 731-738 - [c10]Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi, Yasuhito Koumura:
Thread-based Programming for the EM-4 Hybrid Dataflow Machine. ISCA 1992: 146-155 - 1991
- [c9]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Design and Implementation of a Versatile Interconnection Network in the EM-4. ICPP (1) 1991: 426-430 - [c8]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Prototype Implementation of a Highly Parallel Dataflow Machine EM-4. IPPS 1991: 278-286 - [c7]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Load balancing by function distribution on the EM-4 prototype. SC 1991: 522-531 - 1990
- [j3]Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba:
Evaluation of a Data-Driven Machine with Advanced Control Mechanism. Syst. Comput. Jpn. 21(5): 15-28 (1990) - [c6]Toshitsugu Yuba, Toshio Shimada, Yoshinori Yamaguchi, Kei Hiraki, Shuichi Sakai:
Dataflow computer development in Japan. ICS 1990: 140-147
1980 – 1989
- 1989
- [c5]Yoshinori Yamaguchi, Shuichi Sakai, Kei Hiraki, Yuetsu Kodama:
An Architectural Disgn of a Highly Parallel Dataflow Machine. IFIP Congress 1989: 1155-1160 - [c4]Shuichi Sakai, Yoshinori Yamaguchi, Kei Hiraki, Yuetsu Kodama, Toshitsugu Yuba:
An Architecture of a Dataflow Single Chip Processor. ISCA 1989: 46-53 - 1988
- [j2]Jayantha A. Herath, Yoshinori Yamaguchi, Nobuo Saito, Toshitsugu Yuba:
Dataflow Computing Models, Languages, and Machines for Intelligence Computations. IEEE Trans. Software Eng. 14(12): 1805-1828 (1988) - 1986
- [c3]Jayantha A. Herath, Nobuo Saito, Kenji Toda, Yoshinori Yamaguchi, Toshitsugu Yuba:
DBCL: Data-Flow Computing Base Language with n-Value Logic. FJCC 1986: 353-361 - 1984
- [c2]Yoshinori Yamaguchi, Kenji Toda, Jayantha A. Herath, Toshitsugu Yuba:
EM-3: A Lisp-Based Data-Driven Machine. FGCS 1984: 524-532 - 1983
- [j1]Toshitsugu Yuba, Yoshinori Yamaguchi, Toshio Shimada:
A Control Mechanism of a Lisp-Based Data-Driven Machine. Inf. Process. Lett. 16(3): 139-143 (1983) - [c1]Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba:
A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3). ISCA 1983: 363-369
Coauthor Index
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