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Yu-Chia Liu
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2020 – today
- 2024
- [c9]Abenezer Wudenhe, Yu-Chia Liu, Chris Chen, Hung-Wei Tseng:
Accel-Bench: Exploring the Potential of Programming Using Hardware-Accelerated Functions. ISPASS 2024: 301-303 - 2023
- [c8]Yu-Chia Liu, Kuan-Chieh Hsu, Hung-Wei Tseng:
Rethinking Programming Frameworks for In-Storage Processing. DAC 2023: 1-6 - 2021
- [c7]Yu-Chia Liu, Hung-Wei Tseng:
NDS: N-Dimensional Storage. MICRO 2021: 28-45 - [c6]Alec Rohloff, Zackary Allen, Kung-Min Lin, Joshua Okrend, Chengyi Nie, Yu-Chia Liu, Hung-Wei Tseng:
OpenUVR: an Open-Source System Framework for Untethered Virtual Reality Applications. RTAS 2021: 223-236 - [i1]Alec Rohloff, Zackary Allen, Kung-Min Lin, Joshua Okrend, Chengyi Nie, Yu-Chia Liu, Hung-Wei Tseng:
OpenUVR: an Open-Source System Framework for Untethered Virtual Reality Applications. CoRR abs/2101.07327 (2021) - 2020
- [c5]Chiapin Wang, Yu-Chia Liu, Han-Chi Gao, Tsung-Yi Fan Chiang:
Reinforcement-Learning Based Radio Resources Allocation in Licensed Assisted Access. SmartCloud 2020: 169-174
2010 – 2019
- 2012
- [c4]Ming-Huang Li, Cheng-Syun Li, Li-Jen Hou, Yu-Chia Liu, Sheng-Shian Li:
A 1.57mW 99dBΩ CMOS transimpedance amplifier for VHF micromechanical reference oscillators. ISCAS 2012: 209-212 - 2010
- [j1]Jinn-Shyan Wang, Chun-Yuan Cheng, Je-Ching Liu, Yu-Chia Liu, Yi-Ming Wang:
A Duty-Cycle-Distortion-Tolerant Half-Delay-Line Low-Power Fast-Lock-in All-Digital Delay-Locked Loop. IEEE J. Solid State Circuits 45(5): 1036-1047 (2010) - [c3]Jinn-Shyan Wang, Chun-Yuan Cheng, Je-Ching Liu, Yu-Chia Liu, Yi-Ming Wang:
A 55nm 1GHz one-cycle-locking de-skewing circuit. ISCAS 2010: 1755-1758
2000 – 2009
- 2006
- [c2]Jinn-Shyan Wang, Yi-Ming Wang, Chun-Yuan Cheng, Yu-Chia Liu:
An improved SAR controller for DLL applications. ISCAS 2006 - [c1]Tzer-Shyong Chen, Fuh-Gwo Jeng, Yu-Chia Liu:
Hacking Tricks Toward Security on Network Environments. PDCAT 2006: 442-447
Coauthor Index
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last updated on 2024-07-31 21:38 CEST by the dblp team
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