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2020 – today
- 2023
[j5]Mohammad Rahmani Fadiheh
, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz:
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. IEEE Trans. Computers 72(1): 222-235 (2023)- 2022
- [c17]Wolfgang Ecker, Peer Adelt, Wolfgang Müller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grüttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jörg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz:
The Scale4Edge RISC-V Ecosystem. DATE 2022: 808-813 - 2021
- [i1]Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz:
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. CoRR abs/2108.01979 (2021)
2010 – 2019
- 2014
- [c16]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Coverage of compositional property sets under reactive constraints. ISQED 2014: 589-596 - 2013
- [j4]Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, Jörg Bormann, Markus Wedler, Minh D. Nguyen, Dominik Stoffel, Wolfgang Kunz:
A New Formal Verification Approach for Hardware-dependent Embedded System Software. IPSJ Trans. Syst. LSI Des. Methodol. 6: 135-145 (2013) - [c15]Bernard Schmidt, Carlos Villarraga, Jörg Bormann, Dominik Stoffel, Markus Wedler, Wolfgang Kunz:
A computational model for SAT-based verification of hardware-dependent low-level embedded system software. ASP-DAC 2013: 711-716 - [c14]Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, Dominik Stoffel, Wolfgang Kunz, Jörg Bormann:
A Hardware-Dependent Model for SAT-based Verification of Interrupt-Driven Low-level Embedded System Software. MBMV 2013: 49-60 - [c13]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Compositional Completeness over reactive Constraints. MBMV 2013: 83-96 - [c12]Carlos Villarraga, Bernard Schmidt, Jörg Bormann, Christian Bartsch, Dominik Stoffel, Wolfgang Kunz:
An equivalence checker for hardware-dependent embedded system software. MEMOCODE 2013: 119-128 - 2012
- [c11]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Formal Plausibility Checks for Environment Constraints. FDL (Selected Papers) 2012: 1-16 - [c10]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Formal plausibility checks for environment constraints. FDL 2012: 13-19 - 2010
- [c9]Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Jörg Bormann, Wolfgang Kunz:
Analyzing k-step induction to compute invariants for SAT-based property checking. DAC 2010: 176-181 - [c8]Ulrich Kühne, Sven Beyer, Jörg Bormann, John Barstow:
Automated formal verification of processors based on architectural models. FMCAD 2010: 129-136 - [c7]Joakim Urdahl, Dominik Stoffel, Jörg Bormann, Markus Wedler, Wolfgang Kunz:
Path predicate abstraction by complete interval property checking. FMCAD 2010: 207-215
2000 – 2009
- 2009
- [c6]Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Jörg Bormann:
A re-use methodology for formal SoC protocol compliance verification. FDL 2009: 1-6 - 2008
- [j3]Minh D. Nguyen, Max Thalmaier, Markus Wedler, Jörg Bormann, Dominik Stoffel, Wolfgang Kunz:
Unbounded Protocol Compliance Verification Using Interval Property Checking With Invariants. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 2068-2082 (2008) - [j2]Jens Schönherr, Martin Freibothe, Bernd Straube, Jörg Bormann:
Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking. Theor. Comput. Sci. 404(3): 293-307 (2008) - 2004
- [c5]Martin Freibothe, Jens Schönherr, Bernd Straube, Jörg Bormann:
Semi-formal Verification of the quasi-static behavior of Mixed-Signal Circuits by SAT-based Property Checking. ISoLA (Preliminary proceedings) 2004: 181-187 - [c4]Alexander Thomas, Jürgen Becker, Ulrich Heinkel, Klaus Winkelmann, Jörg Bormann:
Formale Verifikation eines Sonet/SDH Framers. MBMV 2004: 280-288 - 2001
- [j1]Jörg Bormann, Christoph Spalinger:
Formale Verifikation für Nicht-Formalisten (Formal Verification for Non-Formalists). Informationstechnik Tech. Inform. 43(1): 22-28 (2001) - [c3]Jörg Bormann:
Formale Verifikation wird zum Handwerk. MBMV (1) 2001: 9-10
1990 – 1999
- 1995
- [c2]Jörg Bormann, Jörg Lohse, Michael Payer, Gerd Venzl:
Model Checking in Industrial Hardware Design. DAC 1995: 298-303 - 1992
- [c1]Jörg Bormann, H. Nusser-Wehlan, Gerd Venzl:
Invited Talk: Formal Design in an Industrial Research Laboratory: Lessons and Perspectives. Designing Correct Circuits 1992: 193-213
Coauthor Index
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