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Books and Theses
- 2016
[b1]Gregor Sievers:
Entwurfsraumexploration eng gekoppelter paralleler Rechnerarchitekturen. Bielefeld University, Germany, 2016
Journal Articles
- 2018
- [j1]Johannes Ax
, Gregor Sievers, Julian Daberkow, Martin Flasskamp, Marten Vohrmann, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, Ulrich Rückert:
CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Trans. Parallel Distributed Syst. 29(5): 1030-1043 (2018)
Conference and Workshop Papers
- 2016
- [c8]Martin Flasskamp, Gregor Sievers, Johannes Ax, Christian Klarhorst, Thorsten Jungeblut, Wayne Kelly, Michael Thies, Mario Porrmann:
Performance estimation of streaming applications for hierarchical MPSoCs. RAPIDO@HiPEAC 2016: 3:1-3:6 - 2015
- [c7]Gregor Sievers, Johannes Ax, Nils Kucza, Martin Flasskamp, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, Ulrich Rückert:
Evaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI. ISCAS 2015: 1925-1928 - [c6]Gregor Sievers, Julian Daberkow, Johannes Ax, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert:
Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI. MCSoC 2015: 175-181 - [c5]Johannes Ax, Gregor Sievers, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, Mario Porrmann:
System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. NoCArc@MICRO 2015: 3-8 - 2014
- [c4]Boris Hübener, Gregor Sievers, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert:
CoreVA: A Configurable Resource-Efficient VLIW Processor Architecture. EUC 2014: 9-16 - [c3]Wayne Kelly, Martin Flasskamp, Gregor Sievers, Johannes Ax, Jianing Chen, Christian Klarhorst, Christoph Ragg, Thorsten Jungeblut, Andrew Sorensen:
A communication model and partitioning algorithm for streaming applications for an embedded MPSoC. ISSoC 2014: 1-6 - 2013
- [c2]Gregor Sievers, Peter Christ, Julian Einhaus, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert:
Design-space exploration of the configurable 32 bit VLIW processor CoreVA for signal processing applications. NORCHIP 2013: 1-4 - 2010
- [c1]Thorsten Jungeblut, Gregor Sievers, Mario Porrmann, Ulrich Rückert:
Design Space Exploration for Memory Subsystems of VLIW Architectures. NAS 2010: 377-385
Coauthor Index
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