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ORCIDHamid Partovi
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2010 – 2019
- 2015
[j3]Luca Ravezzi, Hamid Partovi:
Clock and Synchronization Networks for a 3 GHz 64 Bit ARMv8 8-Core SoC. IEEE J. Solid State Circuits 50(7): 1702-1710 (2015)- 2014
- [c6]Luca Ravezzi, Hamid Partovi, Dong Wang, C. Wang, Ronen Cohen, Matt Ashcraft, Alfred Yeung, Qawi Harvard, Russell Homer, John Ngai, Greg Favor:
Clock and synchronization networks for a 3GHz 64bit ARMv8 8-core SoC. ESSCIRC 2014: 247-250 - [c5]Alfred Yeung, Hamid Partovi, Qawi Harvard, Luca Ravezzi, John Ngai, Russell Homer, M. Ashcraft, Greg Favor:
5.8 A 3GHz 64b ARM v8 processor in 40nm bulk CMOS technology. ISSCC 2014: 110-111 - 2012
- [c4]Hamid Partovi, Alfred Yeung, Luca Ravezzi, Mark Horowitz:
A 3-stage Pseudo Single-phase Flip-flop family. VLSIC 2012: 172-173
2000 – 2009
- 2009
- [c3]Hamid Partovi, Karthik Gopalakrishnan, Luca Ravezzi, Russell Homer, Otto Schumacher, Reinhold Unterricker, Werner Kederer:
Single-ended transceiver design techniques for 5.33Gb/s graphics applications. ISSCC 2009: 136-137 - 2006
- [c2]Hamid Partovi, Wolfgang Walthes, Luca Ravezzi, Paul Lindt, Sivaraman Chokkalingam, Karthik Gopalakrishnan, Andreas Blum, Otto Schumacher, Claudio Andreotti, Michael Bruennert, Bruno Celli-Urbani, Dirk Friebe, Ivo Koren, Michael Verbeck, Ulrich Lange:
Data Recovery and Retiming for the Fully Buffered DIMM 4.8Gb/s Serial Links. ISSCC 2006: 1314-1323 - 2003
- [c1]Hamid Partovi, Bill Evans, Tom Wilson, Scott Shelton, Eric Naviasky, Ethiraj Sanjeevi, Yongli Wen, Karthik Gopalakrishnan, Sivaraman Chokalingam, Hugh Thompson, Mike Casas, Lingting Ye, Mike Hufford, Yujing Qiu, Michelle Williams, Jared James, Alberto Baldisserotto, Steven White, Steve Williams, Domenic Georgantas, Tom Gray:
A 62.5 Gb/s multi-standard SerDes IC. CICC 2003: 585-588
1990 – 1999
- 1999
- [j2]Michael Golden, Steve Hesley, Alisa Scherer, Matthew Crowley, Scott C. Johnson, Stephan Meier, Dirk Meyer, Jerry D. Moench, Stuart F. Oberman, Hamid Partovi, Fred Weber, Scott White, Tim Wood, John Yong:
A seventh-generation x86 microprocessor. IEEE J. Solid State Circuits 34(11): 1466-1477 (1999) - 1997
- [j1]Don Draper, Matt Crowley, John Holst, Greg Favor, Albrecht Schoy, Jeff Trull, Amos Ben-Meir, Rajesh Khanna, Dennis Wendell, Ravi Krishna, Joe Nolan, Dhiraj Mallick, Hamid Partovi, Mark Roberts, Mark Johnson, Thomas H. Lee:
Circuit techniques in a 266-MHz MMX-enabled processor. IEEE J. Solid State Circuits 32(11): 1650-1664 (1997)
Coauthor Index
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