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ORCIDPraveen K. Murthy
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2010 – 2019
- 2014
[c11]Praveen K. Murthy:
Top ten challenges in Big Data security and privacy. ITC 2014: 1
2000 – 2009
- 2007
- [j9]Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya:
Beyond single-appearance schedules: Efficient DSP software synthesis using nested procedure calls. ACM Trans. Embed. Comput. Syst. 6(2): 14 (2007) - 2004
- [j8]Praveen K. Murthy, Shuvra S. Bhattacharyya
:
Buffer merging - a powerful technique for reducing memory requirements of synchronous dataflow specifications. ACM Trans. Design Autom. Electr. Syst. 9(2): 212-237 (2004) - [j7]Shuvra S. Bhattacharyya, Praveen K. Murthy:
The CBP Parameter: A Module Characterization Approach for DSP Software Optimization. J. VLSI Signal Process. 38(2): 131-146 (2004) - [c10]Praveen K. Murthy, Sreeranga P. Rajan, Koichiro Takayama:
High level hardware validation using hierarchical message sequence charts. HLDVT 2004: 167-172 - [c9]Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya:
Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition. SCOPES 2004: 47-61 - 2003
- [e1]Jaime H. Moreno, Praveen K. Murthy, Thomas M. Conte, Paolo Faraboschi:
Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2003, San Jose, California, USA, October 30 - November 1, 2003. ACM 2003, ISBN 1-58113-676-5 [contents] - 2002
- [j6]Praveen K. Murthy, Edward A. Lee:
Multidimensional synchronous dataflow. IEEE Trans. Signal Process. 50(8): 2064-2079 (2002) - 2001
- [j5]Praveen K. Murthy, Shuvra S. Bhattacharyya:
Shared buffer implementations of signal processing systems usinglifetime analysis techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2): 177-198 (2001) - [c8]Praveen K. Murthy, Etan G. Cohen, Steve Rowland:
System canvas: a new design environment for embedded DSP and telecommunication systems. CODES 2001: 54-59 - 2000
- [c7]Praveen K. Murthy, Shuvra S. Bhattacharyya:
Shared Memory Implementations of Synchronous Dataflow Specifications. DATE 2000: 404-410 - [c6]Shuvra S. Bhattacharyya, Praveen K. Murthy:
The CBP parameter - a useful annotation to aid block-diagram compilers for DSP. ISCAS 2000: 209-212
1990 – 1999
- 1999
- [j4]Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee:
Synthesis of Embedded Software from Synchronous Dataflow Specifications. J. VLSI Signal Process. 21(2): 151-166 (1999) - [c5]Praveen K. Murthy, Shuvra S. Bhattacharyya:
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications. ISSS 1999: 78-84 - 1998
- [j3]Felice Balarin, Luciano Lavagno, Praveen K. Murthy, Alberto L. Sangiovanni-Vincentelli:
Scheduling for Embedded Real-Time Systems. IEEE Des. Test Comput. 15(1): 71-82 (1998) - 1997
- [j2]Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee:
APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations. Des. Autom. Embed. Syst. 2(1): 33-60 (1997) - [j1]Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee:
Joint Minimization of Code and Data for Synchronous Dataflow Programs. Formal Methods Syst. Des. 11(1): 41-70 (1997) - [c4]Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee:
Optimized software synthesis for synchronous dataflow. ASAP 1997: 250-262 - 1996
- [c3]Praveen K. Murthy, Edward A. Lee:
An extension of multidimensional synchronous dataflow to handle arbitrary sampling lattices. ICASSP 1996: 3306-3309 - 1995
- [c2]Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee:
Converting graphical DSP programs into memory constrained software prototypes. RSP 1995: 194-200 - 1994
- [c1]Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee:
Minimizing memory requirements for chain-structured synchronous dataflow programs. ICASSP (2) 1994: 453-456
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