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Le-Chin Eugene Liu

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1990 – 1999

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1999
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Le-Chin Eugene Liu, Carl Sechen:
Multilayer chip-level global routing using an efficient graph-based Steiner tree heuristic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(10): 1442-1451 (1999)
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Le-Chin Eugene Liu, Carl Sechen:
Multilayer pin assignment for macro cell circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(10): 1452-1461 (1999)
1998
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Le-Chin Eugene Liu, Hsiao-Ping Tseng, Carl Sechen:
Chip-level area routing. ISPD 1998: 197-204
1997
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Le-Chin Eugene Liu, Carl Sechen:
Multi-layer chip-level global routing using an efficient graph-based Steiner tree heuristic. ED&TC 1997: 311-318

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