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ORCIDHaifeng Liu 0003
Person information
- affiliation: Huazhong University of Science and Technology, Clusters and Grid Computing Lab, National Engineering Research Center for Big Data Technology, Wuhan, China
Other persons with the same name
- Haifeng Liu (aka: Hai-Feng Liu) — disambiguation page
- Haifeng Liu 0001
![[0000-0002-8142-0642]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-8142-0642")
— Zhejiang University, College of Computer Science, State Key Lab of CAD&CG, China (and 1 more) - Haifeng Liu 0002 — Dalian University of Technology, Department of Computer Science, Liaoning, China
- Haifeng Liu 0004 — Guangdong OPPO Mobile Telecommunications Corp., Ltd, Guangdong, China (and 1 more)
- Haifeng Liu 0005 — IBM Research, Information and Knowledge Department, ZGC Software Park, Beijing, China
- Haifeng Liu 0007 — Nanyang Technological University, Centre for Advanced Information Systems, School of Computer Engineering, Singapore
- Haifeng Liu 0008 (aka: Hai-Feng Liu 0008) — Guilin University of Technology, College of Geomatics and Geoinformation, China
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2020 – today
- 2024
[j5]Long Zheng, Yang Li, Jie Xin, Haifeng Liu, Ran Zheng, Xiaofei Liao, Hai Jin:
Minimal Context-Switching Data Race Detection with Dataflow Tracking. J. Comput. Sci. Technol. 39(2): 211-226 (2024)- [j4]Runze Wang, Ao Hu, Long Zheng, Qinggang Wang, Jingrui Yuan, Haifeng Liu, Linchen Yu, Xiaofei Liao, Hai Jin:
An Efficient GCNs Accelerator Using 3D-Stacked Processing-in-Memory Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1360-1373 (2024) - [j3]Chaoqiang Liu, Xiaofei Liao, Long Zheng, Yu Huang, Haifeng Liu, Yi Zhang, Haiheng He, Haoyan Huang, Jingyi Zhou, Hai Jin:
L-FNNG: Accelerating Large-Scale KNN Graph Construction on CPU-FPGA Heterogeneous Platform. ACM Trans. Reconfigurable Technol. Syst. 17(3): 46:1-46:29 (2024) - [c8]Haifeng Liu, Long Zheng, Yu Huang, Haoyan Huang, Xiaofei Liao, Hai Jin:
Towards Redundancy-Free Recommendation Model Training via Reusable-aware Near-Memory Processing. DAC 2024: 255:1-255:6 - [c7]Haifeng Liu, Long Zheng, Yu Huang, Jingyi Zhou, Chaoqiang Liu, Runze Wang, Xiaofei Liao, Hai Jin, Jingling Xue:
Enabling Efficient Large Recommendation Model Training with Near CXL Memory Processing. ISCA 2024: 382-395 - 2023
- [c6]Yu Huang, Long Zheng, Haifeng Liu, Zhuoran Zhou, Dan Chen, Pengcheng Yao, Qinggang Wang, Xiaofei Liao, Hai Jin:
MeG2: In-Memory Acceleration for Genome Graphs Analysis. DAC 2023: 1-6 - [c5]Chaoqiang Liu, Haifeng Liu, Long Zheng, Yu Huang, Xiangyu Ye, Xiaofei Liao, Hai Jin:
FNNG: A High-Performance FPGA-based Accelerator for K-Nearest Neighbor Graph Construction. FPGA 2023: 67-77 - [c4]Long Zheng, Xiangyu Ye, Haifeng Liu, Qinggang Wang, Yu Huang, Chuangyi Gui, Pengcheng Yao, Xiaofei Liao, Hai Jin, Jingling Xue:
AFaVS: Accurate Yet Fast Version Switching for Graph Processing Systems. ICDE 2023: 53-66 - [c3]Haiheng He, Dan Chen, Long Zheng, Yu Huang, Haifeng Liu, Chaoqiang Liu, Xiaofei Liao, Hai Jin:
GraphMetaP: Efficient MetaPath Generation for Dynamic Heterogeneous Graph Models. IPDPS 2023: 13-24 - [c2]Haifeng Liu, Long Zheng, Yu Huang, Chaoqiang Liu, Xiangyu Ye, Jingrui Yuan, Xiaofei Liao, Hai Jin, Jingling Xue:
Accelerating Personalized Recommendation with Cross-level Near-Memory Processing. ISCA 2023: 66:1-66:13 - 2022
- [j2]Yu Huang, Long Zheng, Pengcheng Yao, Qinggang Wang, Haifeng Liu, Xiaofei Liao, Hai Jin, Jingling Xue:
ReaDy: A ReRAM-Based Processing-in-Memory Accelerator for Dynamic Graph Convolutional Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3567-3578 (2022) - [j1]Long Zheng, Haifeng Liu, Yu Huang, Dan Chen, Chaoqiang Liu, Haiheng He, Xiaofei Liao, Hai Jin, Jingling Xue:
A Flexible Yet Efficient DNN Pruning Approach for Crossbar-Based Processing-in-Memory Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3745-3756 (2022) - [c1]Dan Chen, Hai Jin, Long Zheng, Yu Huang, Pengcheng Yao, Chuangyi Gui, Qinggang Wang, Haifeng Liu, Haiheng He, Xiaofei Liao, Ran Zheng:
A General Offloading Approach for Near-DRAM Processing-In-Memory Architectures. IPDPS 2022: 246-257
Coauthor Index
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