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Books and Theses
- 2001
[b1]Lambert Schaelicke:
Architectural Support of User-Level Input/Output. University of Utah, USA, 2001
Journal Articles
- 2006
- [j4]Lambert Schaelicke, Michael A. Parker:
The design and utility of the ML-RSIM system simulator. J. Syst. Archit. 52(5): 283-297 (2006) - [j3]Lambert Schaelicke, Alan L. Davis:
Design Trade-Offs for User-Level I/O Architectures. IEEE Trans. Computers 55(8): 962-973 (2006) - 2005
- [j2]Lambert Schaelicke:
Evaluating the impact of the simulation environment on experimentation results. Perform. Evaluation 61(4): 329-346 (2005) - 2001
- [j1]Lixin Zhang, Zhen Fang, Michael A. Parker, Binu K. Mathew, Lambert Schaelicke, John B. Carter, Wilson C. Hsieh, Sally A. McKee:
The Impulse Memory Controller. IEEE Trans. Computers 50(11): 1117-1132 (2001)
Conference and Workshop Papers
- 2009
- [c11]Matthew A. Watkins, Sally A. McKee, Lambert Schaelicke:
Revisiting Cache Block Superloading. HiPEAC 2009: 339-354 - 2007
- [c10]Matthew A. Watkins, Sally A. McKee, Lambert Schaelicke:
A Phase-Adaptive Approach to Increasing Cache Performance. PACT 2007: 432 - 2005
- [c9]Lambert Schaelicke, Kyle B. Wheeler, Curt Freeland:
SPANIDS: a scalable network intrusion detection loadbalancer. Conf. Computing Frontiers 2005: 315-322 - 2004
- [c8]Timothy J. Dysart, Branden J. Moore, Lambert Schaelicke, Peter M. Kogge:
Cache implications of aggressively pipelined high performance microprocessors. ISPASS 2004: 123-132 - 2003
- [c7]Branden J. Moore, Thomas Slabach, Lambert Schaelicke:
Profiling Interrupt Handler Performance through Kernel Instrumentation. ICCD 2003: 156-163 - [c6]Lambert Schaelicke, Thomas Slabach, Branden J. Moore, Curt Freeland:
Characterizing the Performance of Network Intrusion Detection Sensors. RAID 2003: 155-172 - 2000
- [c5]Lambert Schaelicke, Al Davis, Sally A. McKee:
Profiling I/O Interrupts in Modern Architectures. MASCOTS 2000: 115-123 - 1999
- [c4]John B. Carter, Wilson C. Hsieh, Leigh Stoller, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael A. Parker, Lambert Schaelicke, Terry Tateyama:
Impulse: Building a Smarter Memory Controller. HPCA 1999: 70-79 - 1998
- [c3]John B. Carter, Wilson C. Hsieh, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael A. Parker, Lambert Schaelicke, Leigh Stoller, Terry Tateyama:
Memory System Support for Irregular Applications. LCR 1998: 17-26 - [c2]Lambert Schaelicke, Al Davis:
Improving I/O Performance with a Conditional Store Buffer. MICRO 1998: 160-169 - 1997
- [c1]Ulrich Brüning, Lambert Schaelicke:
ATOLL: A High-Performance Communication Device for Massively Parallel Systems. APDC 1997: 228-234
Coauthor Index
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