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2010 – 2019
- 2015
[b1]Markus Meissner:
FEATS - Framework for Explorative, Analog Topology Synthesis. Frankfurt University, Germany, 2015- [j1]Markus Meissner, Lars Hedrich:
FEATS: Framework for Explorative Analog Topology Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(2): 213-226 (2015) - [c6]Julius von Rosen, Markus Meissner, Lars Hedrich:
Semiautomatic implementation of a bioinspired reliable analog task distribution architecture for multiple analog cores. DATE 2015: 912-915 - 2012
- [c5]Markus Meissner, Oliver Mitea, Linda Luy, Lars Hedrich:
Fast isomorphism testing for a graph-based analog circuit synthesis framework. DATE 2012: 757-762 - 2011
- [c4]Oliver Mitea, Markus Meissner, Lars Hedrich, P. Jores:
Automated constraint-driven topology synthesis for analog circuits. DATE 2011: 1662-1665 - [c3]Oliver Mitea, Markus Meissner, Lars Hedrich:
Topology synthesis of analog circuits with yield optimization and evaluation using pareto fronts. VLSI-SoC 2011: 78-81
2000 – 2009
- 2004
- [c2]Markus Meissner, Klaus Sponsel, Kristian Cvecek
, Andreas Benz, Stefan Weisser, Bernhard Schmauss, Gerd Leuchs:
BER Improvement Using a 2-R Regenerator Based on an Asymmetric Nonlinear Optical Loop Mirror. OpNeTec 2004: 438-444 - [c1]Klaus Sponsel, Markus Meissner, Kristian Cvecek, Bernhard Schmauss, Gerd Leuchs:
Chirp-Free Transmission through a NOLM Based Optical Regenerator. OpNeTec 2004: 552-559
Coauthor Index
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