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ORCIDStanislaw Deniziak
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2020 – today
- 2024
[j14]Pawel Pieta
, Hubert Jegierski, Pawel Babiuch, Maciej Jegierski, Miroslaw Plaza, Grzegorz Lukawski, Stanislaw Deniziak, Artur Jasinski, Jacek Opalka, Pawel Wegrzyn, Magdalena Igras-Cybulska, Adrian Lapczynski:
Automated Classification of Virtual Reality User Motions Using a Motion Atlas and Machine Learning Approach. IEEE Access 12: 94584-94609 (2024)- [j13]Miroslaw Plaza, Marcin Kozlowski, Michal Lucki, Radoslaw Belka, Stanislaw Deniziak, Jiri Vodrazka:
RTLS Systems Designing Approach Using Beacon Technology. IEEE Internet Things J. 11(8): 14857-14869 (2024) - [c43]Magdalena Igras-Cybulska, Barbara Kolber-Bugajska, Rafal Salamon, Pawel Babiuch, Hubert Jegierski, Maciej Jegierski, Adrian Lapczynski, Alicja Marmon, Kamil Kwiatkowski, Artur Cybulski, Miroslaw Plaza, Grzegorz Lukawski, Stanislaw Deniziak, Pawel Pieta, Artur Jasinski, Jacek Opalka, Pawel Wegrzyn:
Supporting Unity Developers with an AI-Powered Asset: Insights from an Exploratory User Study on Multiplayer Game Development Magdalena Igras-Cybulska. SYNERGY@AVI 2024 - [c42]Pawel Babiuch, Adrian Lapczynski, Hubert Jegierski, Maciej Jegierski, Rafal Salamon, Barbara Kolber-Bugajska, Mirosaw Paza, Stanislaw Deniziak, Pawel Pieta, Grzegorz Lukawski, Artur Jasinski, Jacek Opalka, Alicia Marmon, Kamil Kwiatkowski, Artur Cybulski, Magdalena Igras-Cybulska, Pawel Wegrzyn:
MUN: an AI-powered multiplayer networking solution for VR games. VR Workshops 2024: 1204-1205 - 2023
- [c41]Tomasz Michno, Roman Stanislaw Deniziak, Aleksandra Michno:
Web Based Application for Probability Job Scheduling. DCAI (2) 2023: 36-45 - [c40]Stanislaw Deniziak, Miroslaw Plaza, Lukasz Arcab:
Real-time Communication Model for IoT Systems. FedCSIS 2023: 931-936 - 2022
- [j12]Lukasz Pawlik, Miroslaw Plaza, Stanislaw Deniziak, Ewa Boksa:
A method for improving bot effectiveness by recognising implicit customer intent in contact centre conversations. Speech Commun. 143: 33-45 (2022) - [c39]Tomasz Michno, Roman Stanislaw Deniziak:
Multimodal Network Based Graphs of Primitives Storage Concept for Web Mining CBIR. DCAI (2) 2022: 3-12 - 2021
- [j11]Adam Krechowicz, Stanislaw Deniziak, Grzegorz Lukawski:
Highly Scalable Distributed Architecture for NoSQL Datastore Supporting Strong Consistency. IEEE Access 9: 69027-69043 (2021) - [j10]Miroslaw Plaza, Lukasz Pawlik, Stanislaw Deniziak:
Call Transcription Methodology for Contact Center Systems. IEEE Access 9: 110975-110988 (2021) - [j9]Radoslaw Belka, Roman Stanislaw Deniziak, Grzegorz Lukawski, Pawel Pieta:
BLE-Based Indoor Tracking System with Overlapping-Resistant IoT Solution for Tourism Applications. Sensors 21(2): 329 (2021) - [j8]Stanislaw Deniziak, Mariusz Wisniewski:
DECOLib: A library of components for DECOmposition of discrete functions. SoftwareX 16: 100799 (2021) - 2020
- [c38]Stanislaw Deniziak, Slawomir Bak:
Scheduling of Distributed Applications in HHPCaaS Clouds for Internet of Things. DDECS 2020: 1-4 - [c37]Stanislaw Deniziak, Leszek Ciopinski:
Synthesis of Self-Adaptable Software for Multicore Embedded Systems. DDECS 2020: 1-4
2010 – 2019
- 2019
- [j7]Stanislaw Deniziak, Robert Tomaszewski:
Co-synthesis of contention-free energy-efficient NOC-based real time embedded systems. J. Syst. Archit. 98: 92-101 (2019) - [c36]Roman Stanislaw Deniziak, Tomasz Michno:
Graph of Primitives Matching Problem in the World Wide Web CBIR Searching Using Query by Approximate Shapes. DCAI (Special Sessions) 2019: 77-84 - 2018
- [j6]Mariusz Wisniewski, Stanislaw Deniziak:
BMB synthesis of binary functions using symbolic functional decomposition for LUT-based FPGAs. J. Parallel Distributed Comput. 120: 16-22 (2018) - [c35]Roman Stanislaw Deniziak, Tomasz Michno:
World Wide Web CBIR Searching Using Query by Approximate Shapes. DCAI (Special Sessions) 2018: 87-95 - [c34]Adam Krechowicz, Stanislaw Deniziak:
Hierarchical Clustering in Scalable Distributed Two-Layer Datastore for Big Data as a Service. ES 2018: 138-145 - [c33]Stanislaw Deniziak, Tomasz Michno:
Query by Approximate Shapes Image Retrieval with improved object sketch extraction algorithm. FedCSIS 2018: 555-559 - [c32]Stanislaw Deniziak, Robert Tomaszewski:
Codesign of energy and resource efficient contention-free Network-on Chip for real-time embedded systems. NoCArc@MICRO 2018: 1-6 - 2017
- [c31]Adam Krechowicz, Stanislaw Deniziak:
Business Intelligence Platform for Big Data based on Scalable Distributed Two-Layer Data Store. FedCSIS (Communication Papers) 2017: 177-182 - [c30]Stanislaw Deniziak, Tomasz Michno:
New Content Based Image Retrieval database structure using Query by Approximate Shapes. FedCSIS 2017: 613-621 - 2016
- [j5]Stanislaw Deniziak, Tomasz Michno, Adam Krechowicz:
Content Based Image Retrieval Using Modified Scalable Distributed Two-Layer Data Structure. Int. J. Comput. Sci. Appl. 13(2): 106-120 (2016) - [c29]Stanislaw Deniziak, Mariusz Wisniewski, Karol Wieczorek:
Synthesis of Multivalued Logical Networks for FPGA Implementations. DSD 2016: 657-660 - [c28]Stanislaw Deniziak, Tomasz Michno:
Content Based Image Retrieval using Query by Approximate Shape. FedCSIS 2016: 807-816 - 2015
- [j4]Stanislaw Deniziak, Mariusz Wisniewski:
Symbolic Functional Decomposition of Multivalued Functions. J. Multiple Valued Log. Soft Comput. 24(5-6): 425-452 (2015) - [c27]Adam Krechowicz, Stanislaw Deniziak, Grzegorz Lukawski, Mariusz Bedla:
Preserving Data Consistency in Scalable Distributed Two Layer Data Structures. BDAS 2015: 126-135 - [c26]Stanislaw Deniziak, Tomasz Michno:
Query by Shape for Image Retrieval from Multimedia Databases. BDAS 2015: 377-386 - [c25]Stanislaw Deniziak, Leszek Ciopinski:
Synthesis of power aware adaptive schedulers for embedded systems using developmental genetic programming. FedCSIS 2015: 449-459 - [c24]Stanislaw Deniziak, Tomasz Michno, Adam Krechowicz:
The scalable distributed two-layer Content Based Image Retrieval data store. FedCSIS 2015: 827-832 - [c23]Stanislaw Deniziak, Tomasz Michno:
Query-by-Shape interface for Content Based Image Retrieval. HSI 2015: 108-114 - [c22]Adam Krechowicz, Stanislaw Deniziak, Mariusz Bedla, Arkadiusz Chrobot, Grzegorz Lukawski:
Scalable Distributed Two-Layer Block Based Datastore. PPAM (1) 2015: 302-311 - [r1]Stanislaw Deniziak, Leszek Ciopinski, Grzegorz Pawinski:
Design of Real-Time Computer-Based Systems Using Developmental Genetic Programming. Handbook of Genetic Programming Applications 2015: 221-244 - 2014
- [c21]Krzysztof Sapiecha, Leszek Ciopinski, Stanislaw Deniziak:
An Application of Developmental Genetic Programming for Automatic Creation of Supervisors of Multi-task Real-Time Object-Oriented Systems. FedCSIS 2014: 501-509 - [c20]Slawomir Bak, Stanislaw Deniziak:
Synthesis of Real Time Distributed Applications for Cloud Computing. FedCSIS 2014: 743-752 - [c19]Stanislaw Deniziak, Leszek Ciopinski, Grzegorz Pawinski, Karol Wieczorek, Slawomir Bak:
Cost Optimization of Real-Time Cloud Applications Using Developmental Genetic Programming. UCC 2014: 774-779 - 2012
- [c18]Stanislaw Deniziak, Karol Wieczorek:
Evolutionary Optimization of Decomposition Strategies for Logical Functions. ICAISC (SIDE-EC) 2012: 182-189 - [c17]Slawomir Bak, Radoslaw Czarnecki, Stanislaw Deniziak:
Synthesis of Real-Time Applications for Internet of Things. ICPCA/SWS 2012: 35-49 - [c16]Stanislaw Deniziak, Konrad Kurczyna:
Aspect-oriented SystemC-based performance evaluation of real-time embedded software. PDeS 2012: 67-72 - 2011
- [c15]Stanislaw Deniziak, Karol Wieczorek:
Parallel Approach to the Functional Decomposition of Logical Functions Using Developmental Genetic Programming. PPAM (1) 2011: 406-415 - 2010
- [c14]Robert Tomaszewski, Stanislaw Deniziak:
Contention-free and application-specific network-on-chip generation for embedded systems. PDeS 2010: 34-39
2000 – 2009
- 2009
- [c13]Stanislaw Deniziak, Mariusz Wisniewski:
A symbolic RTL synthesis for LUT-based FPGAs. DDECS 2009: 102-107 - [c12]Stanislaw Deniziak, Robert Tomaszewski:
Contention-avoiding custom topology generation for network-on-chip. DDECS 2009: 234-237 - 2008
- [c11]Stanislaw Deniziak, Mariusz Wisniewski:
An Integrated Input Encoding and Symbolic Functional Decomposition for LUT-Based FPGAs. DDECS 2008: 22-25 - [c10]Stanislaw Deniziak, Robert Tomaszewski:
Rapid Prototyping of NoC Architectures from a SystemC Specification. DDECS 2008: 104-109 - [c9]Stanislaw Deniziak, Mariusz Wisniewski:
An symbolic decomposition of functions with multi-valued inputs and outputs for FPGA-based implementation. FPL 2008: 397-402 - [c8]Stanislaw Deniziak, Adam Gorski:
Hardware/Software Co-synthesis of Distributed Embedded Systems Using Genetic Programming. ICES 2008: 83-93 - 2007
- [c7]Radoslaw Czarnecki, Stanislaw Deniziak:
Resource Constrained Co-synthesis of Self-reconfigurable SOPCs. DDECS 2007: 49-54 - 2004
- [j3]Joanna Strug, Stanislaw Deniziak, Krzysztof Sapiecha:
Validation of reactive embedded systems against specification requirements. Ann. UMCS Informatica 2(1): 173-182 (2004) - [j2]Stanislaw Deniziak, Krzysztof Sapiecha:
RT-level fast fault simulator. Ann. UMCS Informatica 2(1): 341-349 (2004) - [c6]Joanna Strug, Stanislaw Deniziak, Krzysztof Sapiecha:
Validation of Reactive Embedded Systems against Temporal Requirements. ECBS 2004: 152-160 - [c5]Stanislaw Deniziak, Krzysztof Sapiecha:
Fast high-level fault simulator. ICECS 2004: 583-586 - 2003
- [c4]Radoslaw Czarnecki, Stanislaw Deniziak, Krzysztof Sapiecha:
An Iterative Improvement Co-synthesis Algorithm for Optimization of SOPC Architecture with Dynamically Reconfigurable FPGAs. DSD 2003: 443-446 - 2001
- [j1]Stanislaw Deniziak, Krzysztof Sapiecha:
Developing a High-Level Fault Simulation Standard. Computer 34(5): 89-90 (2001)
1990 – 1999
- 1999
- [c3]Stanislaw Deniziak, Krzysztof Sapiecha:
High Level Testbench Generation for VHDL Models. ECBS 1999: 146-151 - 1998
- [c2]Joanna Sapiecha, Krzysztof Sapiecha, Stanislaw Deniziak:
HTDD based parallel fault simulator. ICECS 1998: 217-220 - 1994
- [c1]Stanislaw Deniziak, Krzysztof Sapiecha:
Cupland - A Behavioral Level Description Compiler for Designing of PLD/EPLD-Based Systems. ISCAS 1994: 201-204
Coauthor Index
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