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ORCIDGeorge Razvan Voicu
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2010 – 2019
- 2018
[j3]Marius Enachescu
, Mihai Lefter, George Razvan Voicu, Sorin Dan Cotofana:
Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory. IEEE Trans. Emerg. Top. Comput. 6(2): 184-199 (2018)- 2017
- [j2]George Razvan Voicu, Sorin Dan Cotofana:
High-Performance, Cost-Effective 3D Stacked Wide-Operand Adders. IEEE Trans. Emerg. Top. Comput. 5(2): 179-192 (2017) - [c12]Mihai Lefter, George Razvan Voicu, Thomas Marconi, Valentin Savin, Sorin Dan Cotofana:
LDPC-Based Adaptive Multi-Error Correction for 3D Memories. ICCD 2017: 265-268 - [c11]Mihai Lefter, Thomas Marconi, George Razvan Voicu, Sorin Dan Cotofana:
Low cost multi-error correction for 3D polyhedral memories. NANOARCH 2017: 13-18 - 2015
- [c10]Mihai Lefter, George Razvan Voicu, Sorin Dan Cotofana:
A shared polyhedral cache for 3D wide-I/O multi-core computing platforms. ISCAS 2015: 425-428 - 2014
- [c9]Mihai Lefter, Marius Enachescu, George Razvan Voicu, Sorin Dan Cotofana:
Energy effective 3D stacked hybrid NEMFET-CMOS caches. NANOARCH 2014: 151-156 - 2013
- [c8]George Razvan Voicu, Mihai Lefter, Marius Enachescu, Sorin Dan Cotofana:
3D stacked wide-operand adders: A case study. ASAP 2013: 133-141 - [c7]Mihai Lefter, George Razvan Voicu, Mottaqiallah Taouil, Marius Enachescu, Said Hamdioui, Sorin Dan Cotofana:
Is TSV-based 3D integration suitable for inter-die memory repair? DATE 2013: 1251-1254 - [c6]George Razvan Voicu, Sorin Dan Cotofana:
Towards heterogenous 3D-stacked reliable computing with von Neumann multiplexing. NANOARCH 2013: 122-127 - 2012
- [c5]George Razvan Voicu, Marius Enachescu, Sorin Dan Cotofana:
A 3D stacked high performance scalable architecture for 3D Fourier Transform. ICCD 2012: 498-499 - [c4]Marius Enachescu, George Razvan Voicu, Sorin Dan Cotofana:
Is the road towards "Zero-Energy" paved with NEMFET-based power management? ISCAS 2012: 2561-2564 - [c3]Saleh Safiruddin, Mihai Lefter, Demid Borodin, George Razvan Voicu, Sorin Dan Cotofana:
Zero-performance-overhead online fault detection and diagnosis in 3D stacked integrated circuits. NANOARCH 2012: 123-130 - 2011
- [j1]Kazeem Alagbe Gbolagade, George Razvan Voicu, Sorin Dan Cotofana:
An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set 2n+1, 2n, 2n-1. IEEE Trans. Very Large Scale Integr. Syst. 19(8): 1500-1503 (2011) - [c2]George Razvan Voicu, Marius Enachescu, Sorin Dan Cotofana:
Towards "zero-energy" using NEMFET-based power management for 3D hybrid stacked ICs. NANOARCH 2011: 203-209 - 2010
- [c1]Kazeem Alagbe Gbolagade, George Razvan Voicu, Sorin Dan Cotofana:
Memoryless RNS-to-binary converters for the {2n+1 - 1, 2n, 2n - 1} moduli set. ASAP 2010: 301-304
Coauthor Index
aka: Sorin Dan Cotofana
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