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2010 – 2019
- 2015
[j5]Meng-Fan Chang, Shu-Meng Yang, Chia-Chen Kuo, Ting-Chin Yang, Che-Ju Yeh, Tun-Fei Chien, Li-Yue Huang, Shyh-Shyuan Sheu, Pei-Ling Tseng, Yu-Sheng Chen, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao:
Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications. IEEE Trans. Circuits Syst. II Express Briefs 62-II(1): 80-84 (2015)- 2013
- [j4]Shu-Meng Yang, Meng-Fan Chang, Chi-Chuang Chiang, Ming-Bin Chen, Hiroyuki Yamauchi
:
Low-Voltage Embedded NAND-ROM Macros Using Data-Aware Sensing Reference Scheme for VDDmin, Speed and Power Improvement. IEEE J. Solid State Circuits 48(2): 611-623 (2013) - [j3]Meng-Fan Chang, Ming-Bin Chen, Lai-Fu Chen, Shu-Meng Yang, Yao-Jen Kuo, Jui-Jen Wu, Hsiu-Yun Su, Yuan-Hua Chu, Wen-Chin Wu, Tzu-Yi Yang, Hiroyuki Yamauchi:
A Sub-0.3 V Area-Efficient L-Shaped 7T SRAM With Read Bitline Swing Expansion Schemes Based on Boosted Read-Bitline, Asymmetric-VTH Read-Port, and Offset Cell VDD Biasing Techniques. IEEE J. Solid State Circuits 48(10): 2558-2569 (2013) - 2012
- [c3]Meng-Fan Chang, Che-Wei Wu, Chia-Chen Kuo, Shin-Jang Shen, Ku-Feng Lin, Shu-Meng Yang, Ya-Chin King, Chorng-Jung Lin, Yu-Der Chih:
A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time. ISSCC 2012: 434-436 - [c2]Ming-Pin Chen, Lai-Fu Chen, Meng-Fan Chang, Shu-Meng Yang, Yao-Jen Kuo, Jui-Jen Wu, Mon-Shu Ho, Hsiu-Yun Su, Yuan-Hua Chu, Wen-Chin Wu, Tzu-Yi Yang, Hiroyuki Yamauchi:
A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques. VLSIC 2012: 112-113 - 2010
- [j2]Meng-Fan Chang, Shu-Meng Yang, Chih-Wei Liang, Chih-Chyuang Chiang, Pi-Feng Chiu, Ku-Feng Lin:
Noise-Immune Embedded NAND-ROM Using a Dynamic Split Source-Line Scheme for VDDmin and Speed Improvements. IEEE J. Solid State Circuits 45(10): 2142-2155 (2010) - [c1]Meng-Fan Chang, Shu-Meng Yang, Chih-Wei Liang, Chih-Chyuang Chiang, Pi-Feng Chiu, Ku-Feng Lin, Yuan-Hua Chu, Wen-Chin Wu, Hiroyuki Yamauchi:
A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications. ISSCC 2010: 266-267
2000 – 2009
- 2009
- [j1]Meng-Fan Chang, Shu-Meng Yang:
Analysis and Reduction of Supply Noise Fluctuations Induced by Embedded Via-Programming ROM. IEEE Trans. Very Large Scale Integr. Syst. 17(6): 758-769 (2009)
Coauthor Index
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